DocumentCode
3386918
Title
The impact of NBTI and HCI on deep sub-micron PMOSFETs´ lifetime
Author
Jeon, Chul-Hee ; Kim, San-Young ; Kim, Hyun-Soo ; Rim, Chae-bog
Author_Institution
Samsung Electron. Co., Ltd, Kyunggi-Do, South Korea
fYear
2002
fDate
21-24 Oct. 2002
Firstpage
130
Lastpage
132
Abstract
There have been new phenomena observed in advanced deep sub-micron CMOS technologies. Threshold voltage shift in deep submicron dual gate PMOSFETs due to negative bias temperature instability (NBTI) has become one of major issues among them in terms of reliability concern. In this work, NBTI and hot carrier injection (HCI) effects on the lifetime of 0.13 μm technology with 1.3 nm-thick gate dielectric were investigated and we found NBTI can be a critical limitation of reliability in advanced deep sub-micron technologies.
Keywords
MOSFET; hot carriers; semiconductor device reliability; 0.13 micron; deep-submicron CMOS technology; device lifetime; dual-gate PMOSFET; gate dielectric; hot carrier injection; negative bias temperature instability; reliability; threshold voltage; CMOS technology; Degradation; Dielectrics; Hot carriers; Human computer interaction; MOSFETs; Niobium compounds; Stress; Temperature dependence; Titanium compounds;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Reliability Workshop Final Report, 2002. IEEE International
Print_ISBN
0-7803-7558-0
Type
conf
DOI
10.1109/IRWS.2002.1194249
Filename
1194249
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