Design and FPGA implementation of digital noise generator based on superposition of Gaussian process

Currently in the design of digital communication system, in order to detect the communication quality, plenty of tests need to be done in a noisy environment. The common method is adding analog noise to the transmitted data on the radio. Adding digital noise has always been a difficulty. A digital noise generator based on superposition of Gaussian process is presented in this paper. And hardware program simulation is carried out using Quartus II combined with Modelsim software, even the performance of the digital noise generator is tested on FPGA, simultaneously, compared with the single Gaussian noise.