Title :
The IUA feedback concentrator
Author :
Rana, Deepak ; Weems, Charles C.
Author_Institution :
Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA
Abstract :
A feedback concentrator for a massively parallel, multilevel image understanding architecture (IUA) is presented. A brief overview of the IUA is given. The details of the feedback concentrator mechanism, which was implemented using a custom VLSI chip, are presented. The custom chip uses a combination of circuit techniques to achieve high speed. A description of the custom VLSI concentrator chip is provided. The performance of the architecture is compared with a mesh-connected processor without the feedback mechanism for three common, low-level vision tasks and is shown to be significantly faster
Keywords :
VLSI; application specific integrated circuits; computer vision; computerised pattern recognition; digital signal processing chips; parallel architectures; ASIC; VLSI chip; computer vision; computerised pattern recognition; feedback concentrator; multilevel image understanding architecture; parallel architecture; Associative processing; Communication system control; Computer architecture; Computer vision; Contracts; Feedback; Hardware; Monitoring; Parallel processing; Testing;
Conference_Titel :
Pattern Recognition, 1990. Proceedings., 10th International Conference on
Conference_Location :
Atlantic City, NJ
Print_ISBN :
0-8186-2062-5
DOI :
10.1109/ICPR.1990.119425
