A single bit memory per pixel time domain DPS using multi-reset integration scheme

In this paper, a compact time-domain Digital Pixel Sensor (DPS) is proposed. The Pulse Width Modulation (PWM) based sensor employs a multi-reset integration scheme enabling sequential acquisition of high resolution (8-bit) light intensity while using only a single pixel memory. The proposed multi-reset integration method reduces the memory requirements at the pixel-level, without impacting the pixel encoding resolution, as only one bit memory per pixel is required compared to the eight bits memory in conventional pixel architecture. As a consequence, both the pixel size and the fill factor are significantly improved. A near-optimal timing control unit coupled with a linearization circuit is proposed in order to limit the timing penalty incurred by the proposed integration method enabling to maintain high frame rates. A 64×64 sensor array was fabricated using AMS 0.35μm CMOS technology. A pixel size of 23μm × 21μm with a fill factor of 23% is achieved, resulting in over 75% reduction in terms of pixel size and doubling the pixel fill-factor as compared to a conventional 8-bit DPS. Simulation results demonstrate the feasibility of the proposed scheme while achieving a dynamic range higher than 100 dB as well as good linearity of the Analog to Digital Conversion (ADC) response.