DocumentCode
3386999
Title
Interface traps and oxide charges during NBTI stress in p-MOSFETs
Author
Huard, V. ; Monsieur, F. ; Parthasarathy, C.R. ; Bruyere, S.
Author_Institution
CR&D labs, Philips Semicond., France
fYear
2002
fDate
21-24 Oct. 2002
Firstpage
135
Lastpage
138
Abstract
This work gives an insight of the degradation mechanisms during a negative bias instability stress on ultrathin oxides (tox =20Å). First, it is checked out that there is a correlation between the threshold voltage shift and the increase of interface traps density. Though, the trapping of holes into the oxide is a non-negligible component of the degradation. Applying a positive bias on the gate allows the holes to get trapped out, reducing the threshold voltage shift.
Keywords
MOSFET; hole traps; interface states; semiconductor device reliability; hole trap; interface trap; negative bias temperature instability stress; oxide charge; p-MOSFET; reliability; threshold voltage; ultrathin oxide; CMOS technology; Current measurement; Degradation; Electrodes; Hydrogen; MOSFET circuits; Niobium compounds; Stress; Threshold voltage; Titanium compounds;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Reliability Workshop Final Report, 2002. IEEE International
Print_ISBN
0-7803-7558-0
Type
conf
DOI
10.1109/IRWS.2002.1194251
Filename
1194251
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