DocumentCode
3387110
Title
Light enhanced tungsten via corrosion
Author
Westergard, L. ; Belisle, C. ; Florence, D. ; Haskett, T.
Author_Institution
AMI Semicond. Inc, Pocatello, ID, USA
fYear
2002
fDate
21-24 Oct. 2002
Firstpage
159
Lastpage
161
Abstract
Recently it has been found that tungsten vias exposed during post-metal etch wet cleans are susceptible to galvanic corrosion in a 0.5 micron CMOS process. It was found that the amount of light exposure during the clean, time exposed to the clean solution, structural layout, and clean tool dependencies all contribute to the corrosion. A mechanism for the tungsten corrosion is proposed in this paper.
Keywords
CMOS integrated circuits; corrosion; integrated circuit metallisation; integrated circuit reliability; surface cleaning; tungsten; 0.5 micron; CMOS process; W; galvanic corrosion; integrated circuit reliability; light exposure; post-metal etch wet cleaning; tungsten via; Ash; Atherosclerosis; Corrosion; Etching; Galvanizing; Integrated circuit reliability; Lithography; Plasma applications; Tin; Tungsten;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Reliability Workshop Final Report, 2002. IEEE International
Print_ISBN
0-7803-7558-0
Type
conf
DOI
10.1109/IRWS.2002.1194257
Filename
1194257
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