• DocumentCode
    3387254
  • Title

    Performance optimization using separator sets

  • Author

    Tamiya, Y.

  • Author_Institution
    Fujitsu Labs. Ltd., Kawasaki, Japan
  • fYear
    1999
  • fDate
    7-11 Nov. 1999
  • Firstpage
    191
  • Lastpage
    194
  • Abstract
    In this paper, we propose a new method to optimize a performance of a very large circuit. We find the best set of local transformations to be applied to the circuit, by inserting "padding nodes" on noncritical edges of the circuit, and calculating separator sets of the circuit using separator sets. Our method is robust for very large circuits, because its memory usage and calculation time are linear and polynomial order with the size of the circuit. According to our experimental results, our method has accomplished all circuits, while Singh\´s (1992) selection function method has aborted with three large circuits because of memory overflow. The results also shows our method has a comparable capability in delay optimization to Singh\´s method.
  • Keywords
    circuit optimisation; calculation time; delay optimization; local transformations; memory overflow; memory usage; noncritical edges; padding nodes; performance optimization; selection function method; separator sets; very large circuit; Binary decision diagrams; Circuit optimization; Combinational circuits; Cost function; Delay effects; Laboratories; Optimization methods; Particle separators; Polynomials; Robustness;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer-Aided Design, 1999. Digest of Technical Papers. 1999 IEEE/ACM International Conference on
  • Conference_Location
    San Jose, CA, USA
  • ISSN
    1092-3152
  • Print_ISBN
    0-7803-5832-5
  • Type

    conf

  • DOI
    10.1109/ICCAD.1999.810647
  • Filename
    810647