Design for test of a low power multi-standard GPS/GALILEO RF front-end

This contribution deals with the complete design of a multi-standard GPS/GALILEO front-end, from setting the specifications through to the complete characterization of the device. Special focus will be given to the design for test and the characterization of the design, as optimizing the time spent on this improves time-to-market for the product under development. The highly integrated, low power GPS/GALILEO front-end is designed with a low-IF architecture. The front-end exhibits a voltage gain of 103dB with a power consumption of 66mW from a 3V voltage supply and 38mW if the internal dual-gain LNA is switched OFF. The SSB noise figure of 3.7dB which makes it suitable for high sensitivity applications. Te implemented architecture allows 3 different configurations, adding flexibility to its future applications.