Title :
Test and characterization of a variable-capacity multilevel DRAM
Author :
Koob, John C. ; Ung, Sue A. ; Rao, Ashwin S. ; Leder, Daniel A. ; Joly, Craig S. ; Breen, Kristopher C. ; Brandon, Tyler ; Hume, Michael ; Cockburn, Bruce F. ; Elliott, Duncan G.
Author_Institution :
Dept. of Electr. & Comput. Eng., Alberta Univ., Edmonton, Alta., Canada
Abstract :
Multilevel DRAM (MLDRAM) increases the storage density of DRAMs by using more than two data signal levels in the storage cells. An operational 19200-cell MLDRAM in 1.8-V 0.18-μm mixed-signal CMOS is described that allows 1, 1.5, 2, 2.25 and 2.5 bits-per-cell operation using 2, 3, 4, 5 and 6 data signal levels, respectively. The MLDRAM uses reference and data cell signals that are generated in the cell array using charge sharing. The single-step sensing method uses multiple reference signals in parallel. Test chip characterization features include four cell sizes, two sense amplifier sizes, and bitline shields for half of the cells. New tests were developed based on an MLDRAM fault model. These include basic functionality, retention time, multilevel march, inter-bitline coupling, and cell-plate voltage bump tests. Our results show that the data and reference signals are generated correctly and that MLDRAM is possible for up to six signal levels.
Keywords :
CMOS memory circuits; DRAM chips; fault diagnosis; integrated circuit testing; mixed analogue-digital integrated circuits; 0.18 micron; 1 to 2.5 bit; 1.8 V; DRAM characterization; DRAM storage density; DRAM testing; MLDRAM fault model; MLDRAM functionality; bitline shields; cell array; cell-plate voltage bump test; charge sharing; data signal levels; interbitline coupling; mixed-signal CMOS; multilevel march; retention time; single-step sensing method; storage cells; test chip characterization; variable-capacity multilevel DRAM; Circuit faults; Circuit noise; Decoding; Noise reduction; Prototypes; Random access memory; Signal design; Signal generators; Testing; Voltage;
Conference_Titel :
VLSI Test Symposium, 2005. Proceedings. 23rd IEEE
Print_ISBN :
0-7695-2314-5
DOI :
10.1109/VTS.2005.82
