DocumentCode
3387972
Title
Diagnosis of arbitrary defects using neighborhood function extraction
Author
Desineni, Rao ; Blanton, R. D Shawn
Author_Institution
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
fYear
2005
fDate
1-5 May 2005
Firstpage
366
Lastpage
373
Abstract
We present a methodology for diagnosing arbitrary defects in digital integrated circuits (ICs). Rather than using one or a set of fault models in a cause-effect or effect-cause approach, our methodology derives defect behavior from, the test set, the circuit and its response, and the physical neighbors that surround a potential defect location. The defect locations themselves are identified using a model-independent stage. The methodology enables accurate identification of defect location and behavior through validation via simulation using passing and additional diagnostic test patterns. A byproduct of our methodology is the distinction that can be made among stuck-fault equivalencies which results in improved diagnostic resolution. Several types of shorts and opens are used to demonstrate the applicability of our approach to the diagnosis of arbitrary defects.
Keywords
digital integrated circuits; fault diagnosis; integrated circuit testing; logic testing; arbitrary defects; defect behavior; defect location; diagnostic test patterns; digital integrated circuits; failure analysis; fault models; improved diagnostic resolution; logic simulation; neighborhood function extraction; stuck-fault equivalencies; test generation; yield enhancement; Circuit faults; Circuit simulation; Circuit testing; Digital integrated circuits; Fabrication; Failure analysis; Fault diagnosis; Integrated circuit testing; Logic testing; Manufacturing processes; Diagnosis; defects; failure analysis; test generation; yield enhancement;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 2005. Proceedings. 23rd IEEE
ISSN
1093-0167
Print_ISBN
0-7695-2314-5
Type
conf
DOI
10.1109/VTS.2005.41
Filename
1443451
Link To Document