DocumentCode
3388171
Title
Hardware results demonstrating defect detection using power supply signal measurements
Author
Acharyya, Dhruva ; Plusquellic, Jim
Author_Institution
Dept. of CSEE, Maryland Univ., Baltimore, MD, USA
fYear
2005
fDate
1-5 May 2005
Firstpage
433
Lastpage
438
Abstract
The power supply transient signal (IDDT) method that we propose for defect detection analyzes regional signal variations introduced by defects at a set of power supply pads on the chip under test (CUT). The method is based on the comparison of the CUT with chips that are known to be defect free. A set of defect free chips are analyzed to establish a statistical metric that distinguishes between defect effects and process variation (defect free) effects. This paper presents hardware results that demonstrate the effectiveness of a novel geometry based defect detection technique using nine copies of a test chip. Eight chips are used as defect free chips to derive the statistical limits. Emulated defects are provoked in the ninth chip to evaluate the defect detection capabilities of the method.
Keywords
integrated circuit testing; power supply circuits; statistical analysis; transients; defect detection; defect free chips; power supply signal measurements; power supply transient signal; process variation effects; signal variations; statistical metric; Calibration; Contact resistance; Hardware; Power measurement; Power supplies; Probes; Semiconductor device measurement; Signal analysis; Testing; Transient analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 2005. Proceedings. 23rd IEEE
ISSN
1093-0167
Print_ISBN
0-7695-2314-5
Type
conf
DOI
10.1109/VTS.2005.47
Filename
1443461
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