Title :
JMTP: an architecture for exploiting concurrency in embedded Java applications with real-time considerations
Author :
Helaibel, R. ; Olukotun, K.
Author_Institution :
Comput. Syst. Lab., Stanford Univ., CA, USA
Abstract :
Using Java in embedded systems is plagued by problems of limited runtime performance and unpredictable runtime behavior. The Java Multi-Threaded Processor (JMTP) provides solutions to these problems. The JMTP architecture is a single chip containing an off-the-shelf general purpose processor core coupled with an array of Java Thread Processors (JTPs). Performance can be improved using this architecture by exploiting coarse-grained parallelism in the application. These performance improvements are achieved with relatively small hardware costs. Runtime predictability is improved by implementing a subset of the Java Virtual Machine (JVM) specification in the JTP and trimming away complexity without excessively restricting the Java code a JTP can handle. Moreover the JMTP architecture incorporates hardware to adaptively manage shared JMTP resources in order to satisfy JTP thread timing constraints or provide an early warning for a timing violation. This is an important feature for applications with quality-of-service demands. In addition to the hardware architecture, we describe a software framework that analyzes a Java application for expressed and implicit coarse-grained concurrent threads to execute on JTPs. This framework identifies the optimal mapping of an application to a JMTP with an arbitrary number of JTPs. We have tested this framework on a variety of applications including IDEA encryption with different JTP configurations and confirmed that the algorithm was able to obtain desired results in each case.
Keywords :
Java; multi-threading; object-oriented programming; quality of service; real-time systems; software architecture; IDEA encryption; JMTP; Java; Java Multi-Threaded Processor; Java Virtual Machine; coarse-grained parallelism; concurrency; embedded systems; off-the-shelf general purpose processor; performance improvements; quality-of-service; real-time; runtime performance; thread timing constraints; Application software; Computer architecture; Concurrent computing; Costs; Embedded system; Hardware; Java; Runtime; Timing; Yarn;
Conference_Titel :
Computer-Aided Design, 1999. Digest of Technical Papers. 1999 IEEE/ACM International Conference on
Conference_Location :
San Jose, CA, USA
Print_ISBN :
0-7803-5832-5
DOI :
10.1109/ICCAD.1999.810710