DocumentCode :
3388921
Title :
An evaluation of test generation algorithms for combinational circuits
Author :
Xu, Shiyu ; Frank, Tukwasibwe Justaf
Author_Institution :
Dept. of Comput. Sci., Shanghai Univ., China
fYear :
1999
fDate :
1999
Firstpage :
63
Lastpage :
69
Abstract :
Within this era of VLSI circuits, testability is truly a very crucial issue. To generate a test set for a given circuit, choice of an algorithm within a number of existing test generation algorithms to apply is bound to vary from circuit to circuit. Some objective quantitative measures are used in making such choice. Such measures are so important to the analysis of algorithms that become the subject of this work
Keywords :
automatic test pattern generation; circuit optimisation; combinational circuits; fault diagnosis; genetic algorithms; integrated circuit testing; logic testing; ATPG algorithms; VLSI circuits testability; combinational circuits; fault coverage; genetic algorithm forecasting model; objective quantitative measures; test generation algorithm evaluation; test set; Circuit testing; Combinational circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium, 1999. (ATS '99) Proceedings. Eighth Asian
Conference_Location :
Shanghai
ISSN :
1081-7735
Print_ISBN :
0-7695-0315-2
Type :
conf
DOI :
10.1109/ATS.1999.810730
Filename :
810730
Link To Document :
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