DocumentCode :
3389048
Title :
Test scheduling with loop folding and its application to test configurations with accumulators
Author :
Stroele, Albrecht P. ; Mayer, Frank
Author_Institution :
Inst. of Comput. Design & Fault Tolerance, Karlsruhe Univ., Germany
fYear :
1999
fDate :
1999
Firstpage :
101
Lastpage :
106
Abstract :
For test application, data path circuits are divided into subcircuits. At the inputs and outputs of every subcircuit, accumulators to generate patterns and to compact test responses are configured from the other available modules. Test registers are inserted only at positions where appropriate paths from and to accumulators do not exist. A small set of test configurations is chosen so that all the modules of the data path are tested and the hardware overhead is as low as possible. For each test configuration, we construct a test schedule with minimum test application time. The presented scheduling approach is based on loop folding and uses an integer linear programming formulation. The scheduling procedure always finds a schedule with maximum throughput which reduces test application times significantly
Keywords :
built-in self test; integer programming; integrated circuit testing; linear programming; logic testing; scheduling; accumulators; data path circuits; hardware overhead; integer linear programming formulation; loop folding; minimum test application time; scheduling procedure; test configurations; test registers; test responses; test scheduling; throughput; Application software; Arithmetic; Automatic testing; Circuit testing; Fault tolerance; Kernel; Logic testing; Processor scheduling; Registers; Test pattern generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium, 1999. (ATS '99) Proceedings. Eighth Asian
Conference_Location :
Shanghai
ISSN :
1081-7735
Print_ISBN :
0-7695-0315-2
Type :
conf
DOI :
10.1109/ATS.1999.810736
Filename :
810736
Link To Document :
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