Title :
Electro-thermal simulation for the prediction of chip operation within the package
Author :
Rencz, M. ; Székely, V. ; Poppe, A. ; Torki, K. ; Courtois, B.
Author_Institution :
MicReD Ltd., Hungary
Abstract :
The device level electro-thermal simulation of analog circuits and the logical gate level logi-thermal simulation of digital circuits are addressed in the paper. After presenting the main algorithms, realization questions are also discussed. For both the electro-thermal cases, simulated results of realized structures are presented. These are compared with benchmark results, proving the applicability and the accuracy of the methods.
Keywords :
circuit simulation; integrated circuit modelling; logic simulation; thermal analysis; thermal management (packaging); analog circuit simulation; device level electro-thermal simulation; digital circuits; logical gate level logi-thermal simulation; packaged chip operation prediction; thermal modeling; Analog circuits; Circuit simulation; Digital circuits; Electronic packaging thermal management; Integrated circuit modeling; Integrated circuit packaging; Predictive models; Temperature; Thermal conductivity; Timing;
Conference_Titel :
Semiconductor Thermal Measurement and Management Symposium, 2003. Ninteenth Annual IEEE
Print_ISBN :
0-7803-7793-1
DOI :
10.1109/STHERM.2003.1194357
