DocumentCode :
3389116
Title :
Single transistor latch phenomena in Junctionless Nanotransistors
Author :
Parihar, Manoj Singh ; Ghosh, Debashis ; Armstrong, G.A. ; Kranti, Abhinav
Author_Institution :
Low Power Nanoelectron. Res. Group, Indian Inst. of Technol., Indore, Indore, India
fYear :
2013
fDate :
2-4 Jan. 2013
Firstpage :
72
Lastpage :
73
Abstract :
In this work, we analyze the dependence of steep subthreshold (S-slope) on device and bias parameters of Junctionless (JL) MOSFETs. It is observed that for certain parameters and bias conditions, the JL transistor cannot be turned OFF resulting in a single transistor latch. This phenomenon is an extreme case of impact ionization in JL MOSFETs. It is shown that thicker values of silicon film thickness and gate oxide along with higher drain bias can drive the JL MOSFET in to the latch state.
Keywords :
MOSFET; elemental semiconductors; nanoelectronics; silicon; Si; bias parameters; drain bias; gate oxide; impact ionization; junctionless MOSFET; junctionless nanotransistors; silicon film thickness; single transistor latch phenomena; steep subthreshold; Conferences; Decision support systems; Nanoelectronics; MOSFET; impact ionization and Steep S-slope; junctionless;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nanoelectronics Conference (INEC), 2013 IEEE 5th International
Conference_Location :
Singapore
ISSN :
2159-3523
Print_ISBN :
978-1-4673-4840-9
Electronic_ISBN :
2159-3523
Type :
conf
DOI :
10.1109/INEC.2013.6465957
Filename :
6465957
Link To Document :
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