DocumentCode
3389164
Title
A backside via process for thermal resistance improvement demonstrated using GaAs HBTs
Author
Kofol, J.S. ; Lin, B.J.F. ; Mierzwinski, M. ; Kim, A. ; Armstrong, A. ; Van Tuyl, R.
Author_Institution
Hewlett-Packard Co., Palo Alto, CA, USA
fYear
1997
fDate
4-7 Oct. 1997
Firstpage
267
Lastpage
270
Abstract
The authors report a method for reducing the operating temperatures of GaAs-AlGaAs heterojunction bipolar transistors (HBTs) to acceptable levels, while maintaining the compact device layout needed for high-frequency operation. A structure called backside thermal via is formed by selectively etching nearly all of the GaAs from the back side of the wafer in photolithographically patterned regions, directly under the heat sources, until a five-micron membrane of GaAs remains. Gold is then plated onto the membrane. For one particular transistor design, a greater than 50% reduction of the thermal resistance has been measured. Models suggest that even greater improvement in thermal properties will be obtained as device active area increases.<>
Keywords
III-V semiconductors; aluminium compounds; etching; gallium arsenide; heterojunction bipolar transistors; semiconductor device models; semiconductor technology; thermal resistance; Au plated membrane; Au-GaAs; GaAs-AlGaAs; HBTs; backside thermal via; backside via process; compact device layout; heterojunction bipolar transistors; high-frequency operation; operating temperatures; photolithographically patterned regions; selectively etching; thermal resistance; Biomembranes; Electrical resistance measurement; Etching; Gallium arsenide; Gold; Heterojunction bipolar transistors; Particle measurements; Semiconductor device modeling; Temperature; Thermal resistance;
fLanguage
English
Publisher
ieee
Conference_Titel
Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1992. Technical Digest 1992., 14th Annual IEEE
Conference_Location
Miami Beach, FL, USA
Print_ISBN
0-7803-0773-9
Type
conf
DOI
10.1109/GAAS.1992.247272
Filename
247272
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