Hardware accelerated convolutional neural networks for synthetic vision systems

Author

Farabet, Clément ; Martini, Berin ; Akselrod, Polina ; Talay, Selçuk ; LeCun, Yann ; Culurciello, Eugenio

Author_Institution

Center for Neural Sci., New York Univ., New York, NY, USA

fYear

2010

fDate

May 30 2010-June 2 2010

Firstpage

257

Lastpage

260

Abstract

In this paper we present a scalable hardware architecture to implement large-scale convolutional neural networks and state-of-the-art multi-layered artificial vision systems. This system is fully digital and is a modular vision engine with the goal of performing real-time detection, recognition and segmentation of mega-pixel images. We present a performance comparison between a software, FPGA and ASIC implementation that shows a speed up in custom hardware implementations.

Keywords

application specific integrated circuits; computer vision; field programmable gate arrays; image recognition; image segmentation; neural nets; ASIC; FPGA; convolutional neural network; megapixel image; real time detection; real time recognition; real time segmentation; scalable hardware architecture; state-of-the-art multilayered artificial vision system; vision engine; Acceleration; Artificial neural networks; Computer architecture; Engines; Large-scale systems; Machine vision; Multi-layer neural network; Neural network hardware; Neural networks; Real time systems;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on

Conference_Location

Paris

Print_ISBN

978-1-4244-5308-5

Electronic_ISBN

978-1-4244-5309-2

Type

conf

DOI

10.1109/ISCAS.2010.5537908

Filename

5537908