• DocumentCode
    3389667
  • Title

    Improving the performance of deadlock recovery based routing in irregular mesh NoCs using added mesh-like links

  • Author

    Hosseingholi, Mahdieh ; Ahmadian, Ali Sharif ; Sarbazi-Azad, Hamid

  • Author_Institution
    Int. Campus, Fac. of Sci. & Eng., Sharif Univ. of Technol., Kish Island, Iran
  • fYear
    2010
  • fDate
    May 30 2010-June 2 2010
  • Firstpage
    3236
  • Lastpage
    3239
  • Abstract
    Heterogeneity is one of the challenges in the current NoC design which forces designers to consider irregular topologies. Therefore, finding an optimal topology with minimum cost (minimum use of links, buffers, NIs, etc) and power consumption, and maximum flexibility can provide the best cost-performance trade-off. Irregular mesh is a topology which combines the benefits of regularity and advantage of irregularity. Routing algorithms especially those coupled with wormhole switching should deal with deadlock occurrences. Unlike deadlock avoidance-based schemes, deadlock detection and recovery-based routing schemes, do not restrict routing adaptability. In this paper, we modify irregular mesh architecture and add some extra mesh-like links to improve its performance using deadlock recovery routing. We evaluate the performance under three well-known deadlock recovery routing algorithms and different traffic patterns before and after the link insertion. Simulation results show the proposed method can noticeably reduce the number of detected deadlocks, average packet latency, routing table size at each node, and energy consumption.
  • Keywords
    network routing; network topology; network-on-chip; performance evaluation; system recovery; NoC design; added mesh-like links; average packet latency; cost-performance trade-off; deadlock avoidance-based schemes; deadlock detection; deadlock occurrences; deadlock recovery based routing; deadlock recovery routing algorithms; detected deadlocks; energy consumption; heterogeneity; irregular mesh NoC; irregular mesh architecture; irregular topology; link insertion; optimal topology; performance evaluation; power consumption; recovery-based routing schemes; routing adaptability; routing table size; traffic patterns; wormhole switching; Communication switching; Delay; Energy consumption; Hardware; Network topology; Network-on-a-chip; Packet switching; Routing; Switches; System recovery;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
  • Conference_Location
    Paris
  • Print_ISBN
    978-1-4244-5308-5
  • Electronic_ISBN
    978-1-4244-5309-2
  • Type

    conf

  • DOI
    10.1109/ISCAS.2010.5537921
  • Filename
    5537921