Title :
A comparative study between Fractional-N PLL and Flying-Adder PLL
Author :
Xiu, Liming ; Huang, Chen-Wei ; Gui, Ping
Author_Institution :
NovaTek Microelectron. Corp., Hsinchu, Taiwan
fDate :
May 30 2010-June 2 2010
Abstract :
Frequency synthesis is one of the most important and most actively researched subjects in the field of VLSI mixed-signal circuit design. Among the existing techniques in this area, Fractional-N architecture is a widely used one for generating frequencies which are not integer multiple of the input reference frequency. Flying-Adder architecture is an emerging technique which is based on a new concept, Time-Average-Frequency, to generate frequencies. This paper presents an in-depth analysis and comparison between the two methods.
Keywords :
VLSI; adders; frequency synthesizers; mixed analogue-digital integrated circuits; phase locked loops; VLSI mixed-signal circuit design; flying-adder PLL; flying-adder architecture; fractional-N PLL; fractional-N architecture; frequency synthesis; phase-lock loop; time-average-frequency; Circuit synthesis; Clocks; Delta-sigma modulation; Frequency conversion; Frequency synthesizers; Microelectronics; Phase locked loops; Signal generators; Technological innovation; Voltage-controlled oscillators;
Conference_Titel :
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
978-1-4244-5308-5
Electronic_ISBN :
978-1-4244-5309-2
DOI :
10.1109/ISCAS.2010.5537927
