DocumentCode :
3389774
Title :
A generalized HSPICE macro-model for spin-valve GMR memory bits
Author :
Das, Bodhisattva ; Black, William C., Jr.
Author_Institution :
Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA
Volume :
2
fYear :
1997
fDate :
3-6 Aug. 1997
Firstpage :
1146
Abstract :
This work presents the first generalized circuit macro-model for a Giant-Magneto-Resistance (GMR) memory bit. It is applicable for spin-valve structures and can be easily extended to pseudo-spin-valve structures. The macro-model is realized as a four terminal sub-circuit which emulates GMR bit behavior over a wide range of sense and word line currents. The non-volatile and nonlinear nature of GMR memory bits are accurately represented by this model and simulations of non-volatile GMR latch structures with HSPICE show expected outcomes. The model is flexible and relatively simple: ranges of the write/read currents and bit resistance values are incorporated as parameterized variables and no semiconductor devices are used within the model.
Keywords :
SPICE; giant magnetoresistance; magnetic film stores; magnetoresistive devices; multiterminal networks; random-access storage; HSPICE macro-model; bit resistance values; four terminal sub-circuit; giant magneto resistance; latch structures; parameterized variables; pseudo-spin-valve structures; sense currents; spin-valve GMR memory bits; word line currents; write/read currents; Large scale integration; Logic devices; Magnetic fields; Magnetic hysteresis; Magnetization; Operational amplifiers; Pulse circuits; Resistors; Trademarks; Writing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on
Print_ISBN :
0-7803-3694-1
Type :
conf
DOI :
10.1109/MWSCAS.1997.662280
Filename :
662280
Link To Document :
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