Title :
Multiple fault diagnosis in logic circuits using EB tester and multiple/single fault simulators
Author :
Takahashi, Hiroshi ; Boateng, Kwame Osei ; Yanagida, Nobuhiro ; Takamatsu, Yuzo
Author_Institution :
Dept. of Comput. Sci., Ehime Univ., Matsuyama, Japan
Abstract :
In this paper, we propose a method that uses an EB tester and multiple/single fault simulators to diagnose multiple stuck-at faults in combinational circuits. Based on the primary output values and selected internal line values which are calculated by multiple/single fault simulators, faults are added to or removed from a set of suspected faults. The proposed method repeats additions and removals of faults to avoid missing actual faults in a faulty circuit. In order to reduce the number of lines to be probed by the EB tester, the proposed method selects internal lines to be probed by using a backward path tracing procedure. The experimental results show that the proposed method achieves a small number of suspected faults by probing a small number of internal lines
Keywords :
combinational circuits; electron beam testing; fault diagnosis; fault simulation; integrated circuit testing; integrated logic circuits; logic testing; EB tester; backward path tracing procedure; combinational circuits; electron beam tester; logic circuits; multiple fault diagnosis; multiple stuck-at faults; multiple/single fault simulators; Circuit faults; Circuit simulation; Circuit testing; Fault diagnosis; Logic circuits; Logic testing;
Conference_Titel :
Test Symposium, 1999. (ATS '99) Proceedings. Eighth Asian
Conference_Location :
Shanghai
Print_ISBN :
0-7695-0315-2
DOI :
10.1109/ATS.1999.810773