DocumentCode :
3389976
Title :
An efficient routing algorithm for irregular mesh NoCs
Author :
Mahdavinia, Parisa ; Sarbazi-Azad, Hamid
Author_Institution :
Fac. of Sci. & Eng., Sharif Univ. of Technol., Kish Island, Iran
fYear :
2010
fDate :
May 30 2010-June 2 2010
Firstpage :
3228
Lastpage :
3231
Abstract :
Many researchers favor the mesh topology as the underlying topology of the communication infrastructure of modern SoCs because of its regularity and layout efficiency. However, variability in size and shape of modules used in systems-on-chip has resulted in the use of irregular meshes for practical NoCs. In this paper, we propose a deadlock free routing algorithm for irregular mesh NoCs. Experimental results confirm that the proposed algorithm exhibits a better performance in terms of message latency and power consumption compared to other known routing algorithms for irregular mesh NoCs.
Keywords :
network-on-chip; telecommunication network routing; SoC; communication infrastructure; deadlock free routing algorithm; irregular mesh NoC; layout efficiency; mesh topology; message latency; power consumption; system-on-chip; Computer science; Delay; Energy consumption; Network-on-a-chip; Routing; Shape; System recovery; System-on-a-chip; Tiles; Topology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
978-1-4244-5308-5
Electronic_ISBN :
978-1-4244-5309-2
Type :
conf
DOI :
10.1109/ISCAS.2010.5537936
Filename :
5537936
Link To Document :
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