DocumentCode
339126
Title
High-speed neural network based classifier for real-time application
Author
Chung, Yuk Ying ; Wong, Man To ; Bergmann, Neil W.
Author_Institution
Space Centre for Satellite Navigation, Queensland Univ. of Technol., Brisbane, Qld., Australia
fYear
1998
fDate
1998
Firstpage
506
Abstract
This paper describes how to implement a partially connected neural network by a Giga-Ops Spectrum G800 FPGA (field programmable gate arrays)-based custom computer which consists of up to 32 Xilinx XC4010 logic chips. From the training data, a decision tree is generated by the classifier program C4.5. The tree is then used to initialise the neural network to a nearly optimum configuration. This initialised partially connected neural network is then trained by training data. The trained neural network is then implemented by our custom computer system. This implementation requires fewer connections and can provide a very-high-speed classifier for many real-time image recognition applications
Keywords
decision trees; field programmable gate arrays; image classification; learning (artificial intelligence); neural nets; real-time systems; C4.5 classifier program; Giga-Ops Spectrum G800 FPGA; Xilinx XC4010 logic chips; decision tree; field programmable gate arrays; high-speed neural network; optimum configuration; real-time image recognition; training data; Application software; Australia; Computer networks; Decision trees; Field programmable gate arrays; Neural networks; Neurons; Programmable logic arrays; Real time systems; Space technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing Proceedings, 1998. ICSP '98. 1998 Fourth International Conference on
Conference_Location
Beijing
Print_ISBN
0-7803-4325-5
Type
conf
DOI
10.1109/ICOSP.1998.770261
Filename
770261
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