DocumentCode
33913
Title
Power-efficient real-time solution for adaptive vision algorithms
Author
Tabkhi, Hamed ; Sabbagh, Majid ; Schirner, Gunar
Author_Institution
Dept. of Electr. & Comput. Eng., Northeastern Univ., Boston, MA, USA
Volume
9
Issue
1
fYear
2015
fDate
1 2015
Firstpage
16
Lastpage
26
Abstract
This study focuses on embedded realisation of adaptive vision algorithms, and illustrates the challenges using mixture of Gaussian (MoG) background subtraction. MoG is a frequently used adaptive vision kernel, for example, for surveillance applications. It involves massive computation and communication demands, which renders a software approach infeasible considering a 1 W power budget. To address these challenges, the authors employ a systematic system-level design approach and first analyse the demands at high-level, explore opportunities for bandwidth reduction, and derive a customised system-level specification. Based on the system-level exploration, this study then proposes a communication-centric architecture template that simplifies implementing embedded adaptive vision algorithms. To achieve high efficiency, they propose to separate steaming and algorithm-intrinsic traffic. This allows customising the traffic handling based on role of the data, as well as simplifying interconnecting multiple heterogeneous nodes. The authors demonstrate the benefits of traffic separation and the communication-centric architecture template based on MoG. They realise MoG on the Zynq-7000 SoC processing 1080p 30 Hz stream in real-time. The MoG processing kernel consists of 77 pipeline stages operating at 148.5 MHz. The authors´ solution is more than 600 × faster than an ARM Cortex-A9 with 666 MHz. It only consumes 151 mW of on-chip power operating in real-time.
Keywords
Gaussian processes; computer vision; microprocessor chips; system-on-chip; ARM Cortex-A9; Zynq-7000 SoC; adaptive vision kernel; adaptive vision processing algorithms; algorithm-intrinsic traffic; communication-centric architecture template; data streams; embedded vision; high communication demands; high processing demands; host processor; memory bandwidth; mixture-of-Gaussian background subtraction; power consumption; power-efficient real-time solution; processing power; steaming traffic; system-level design approach; system-level exploration; system-level specification;
fLanguage
English
Journal_Title
Computers & Digital Techniques, IET
Publisher
iet
ISSN
1751-8601
Type
jour
DOI
10.1049/iet-cdt.2014.0075
Filename
7018777
Link To Document