DocumentCode
3391318
Title
Phase amplitude converter with conditional shift operation
Author
Hikawa, Hiroomi ; Namba, Taketo
Author_Institution
Dept. of Sci. & Eng., Kansai Univ., Suita, Japan
fYear
2010
fDate
May 30 2010-June 2 2010
Firstpage
3008
Lastpage
3011
Abstract
This paper proposes a new type of approximation method for sine wave and the proposed method is applied to phase amplitude converter (PAC) used in direct digital frequency synthesizer (DDFS). The approximation is carried out by conditional shift operation (CSO) that reshapes the sawtooth signal from phase accumulator. As the signal purity of the CSO-PAC is not good enough, error correction is employed to improve the signal purity. VHDL simulations along with the circuit size and speed evaluations, are conducted to verify the feasibility of the proposed method. The comparison among other types of PACs shows that the advantage of the proposed PAC is its circuit size. Especially the CSO-PAC without the error correction, is quite small and it can operate at a very high frequency clock. Thus the CSO-PAC may be a good choice for those applications that do not require high purity signal.
Keywords
approximation theory; clocks; direct digital synthesis; error correction; phase convertors; CSO-PAC; VHDL simulations; approximation method; conditional shift operation; direct digital frequency synthesizer; error correction; phase accumulator; phase amplitude converter; sawtooth signal; signal purity; very high frequency clock; Adders; Approximation methods; Circuits; Clocks; Digital-to-frequency converters; Error correction; Frequency synthesizers; Picture archiving and communication systems; Read only memory; Table lookup;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location
Paris
Print_ISBN
978-1-4244-5308-5
Electronic_ISBN
978-1-4244-5309-2
Type
conf
DOI
10.1109/ISCAS.2010.5538000
Filename
5538000
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