Computation of lower and upper bounds for switching activity: a unified approach

Accurate switching activity estimation is crucial for power budgeting. It is impractical to obtain an accurate estimate by simulating the circuit for all possible inputs. An alternate approach would be to compute tight bounds for the switching activity. In this paper, we propose a non-simulative method to compute bounds for switching activity at the logic level. First, we show that the switching activity can be modeled as the Bayesian distance for an abstract two class problem. The computation of the upper and lower bounds for the switching activity is unified in to a single function, ψ(α,p,ρ), where α is a parameter, ρ is the temporal correlation factor and p is the signal probability. The constraints on α for ψ(α,p,ρ) to be tight upper and lower bounds are derived. The proposed approach computes bounds for individual gate switching. Experimental results are obtained by taking spatial and temporal correlations into account. The computations are simple and fast