LV/LP CMOS square-law circuits

In this paper several new CMOS square-law circuit cells with two high impedance input terminals are proposed to achieve wide input voltage operating range with low supply voltage. These cells are constructed based on two methods introduced and as a result, highly accurate signal processing with low power dissipation is possible. The simulations and/or measurements carried out using MOSIS 2 μm n-well process have shown that one of the cells based on the adaptive bias technique, one of the methods introduced, achieved ω_3dB of 426 MHz and the input voltage operating range of 1.8 V with a 3 V supply.