DocumentCode :
3391775
Title :
Low-cost hardware architecture design for 3D warping engine in multiview video applications
Author :
Lin, Pin-Chih ; Tsung, Pei-Kuei ; Chen, Liang-Gee
Author_Institution :
DSP/IC Design Lab., Nat. Taiwan Univ., Taipei, Taiwan
fYear :
2010
fDate :
May 30 2010-June 2 2010
Firstpage :
2964
Lastpage :
2967
Abstract :
As the history of television industry goes, multiview video (MW) and its applications draw more and more attentions by the realistic 3D scene it can bring. In these applications, virtual view synthesis is required for providing free view point sequences so as to fulfill a real-time display system. In this paper, a low-area architecture is proposed. By employing the linear-interpolated approximation algorithm, the large area requirement due to the synthesis parameters is resolved. In addition, redundant information for fraction bits of parameters is further reduced by precision fitting analysis. As a result, 95.9% of area for matrix parameter rendering stage and 69.5% for vector transform stage are reduced with only 0.0059 dB overhead of PSNR performance.
Keywords :
approximation theory; realistic images; video signal processing; 3D warping engine; linear-interpolated approximation algorithm; low-area architecture; low-cost hardware architecture design; matrix parameter rendering; multiview video applications; precision fitting analysis; real-time display system; realistic 3D scene; redundant information; television industry; vector transform; view point sequences; Approximation algorithms; Displays; Engines; Hardware; History; Information analysis; Layout; Linear approximation; Real time systems; TV;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
978-1-4244-5308-5
Electronic_ISBN :
978-1-4244-5309-2
Type :
conf
DOI :
10.1109/ISCAS.2010.5538023
Filename :
5538023
Link To Document :
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