Effective modelling of large NoCs using SystemC

The IEEE SystemC standard has been accepted as an effective high-level system modelling library among designers. However, in order to implement fast simulation models and to consider new ideas and requirements at system level, some enhancements and new features should be added to this standard. This is the reason why OSCI has proposed the TLM 1&2 libraries. In this work, we investigate a very fast but accurate and simple to use modelling methodology for systems which include a large number of modules such as complex Network-on-Chips (NoCs) which have many routers, network interfaces and processing cores. The proposed methodology implements all SystemC processes using normal functions and supports process activation simply by function calls. For this purpose, it utilises a SystemC method process that establishes concurrency and communication among the functions. The experimental results show an improvement of up to 98% in elaboration time and up to 90% in simulation time for small size NoCs. In addition, it can efficiently simulate large NoC with tens of thousands of nodes while traditional SystemC modelling based on threads struggles to simulate hundreds of nodes.