Efficient simulation model for DAC dynamic properties

This paper presents a simulation model for fast and efficient prediction of the dynamic properties of high-resolution current-steering Digital-to-Analog converters. Current source mismatch, limited output impedance of the current sources and timing errors are taken into account in the simulation model. No assumptions about distributions are required for these parameters. Experimental results show simulation time reductions up to 80 times for a 10 bit segmented DAC.