A low-voltage low-power CMOS opamp with rail-to-rail input/output

Author

Lin, Chi-Hung ; Ismail, Mohammed

Author_Institution

Dept. of Electr. Eng., Ohio State Univ., Columbus, OH, USA

Volume

2

fYear

1997

fDate

3-6 Aug. 1997

Firstpage

1193

Abstract

In this paper, a low-voltage low-power two stage rail-to-rail CMOS opamp is presented. The input stage is composed of the complementary differential pairs and a pair of modified current-mode maximum selecting circuits (Maximum Current Selecting Circuit II) in order to achieve rail-to-rail operation and constant-g_m. Using the modified constant-g_m methodology, this input stage co-operated with a family of two class-AB output stages can drive a wide-range of capacitive loads with a large bandwidth-to-supply-power ratio. These opamps reach a high DC gain (≥84 dB), and have a bandwidth-to-supply-power ratio of 13 MHz/mW and 9.5 MHz/mW with capacitive loads 20 pF and 100 pF respectively.

Keywords

CMOS analogue integrated circuits; differential amplifiers; operational amplifiers; 84 dB; class-AB output stages; complementary differential pairs; current-mode maximum selecting circuits; low-power CMOS opamp; low-voltage op amp; modified constant-g_m methodology; rail-to-rail input/output; Circuits; Costs; Energy consumption; Frequency; MOSFETs; Power dissipation; Rail to rail inputs; Rail to rail outputs; Very large scale integration; Wideband;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on

Print_ISBN

0-7803-3694-1

Type

conf

DOI

10.1109/MWSCAS.1997.662293

Filename

662293