CPLD control and design of video processor SAA7111

Author

Baohai Yang

Author_Institution

Coll. of Electron. Eng., Jiujiang Univ., Jiujiang, China

fYear

2011

fDate

19-22 Aug. 2011

Firstpage

1201

Lastpage

1204

Abstract

A new control technique of CPLD is presented. The new method successful initializes the video processor SAA7111. And the key technologies such as the structure of SAA7111, the communication protocol and realization are discussed in detail, together with the partial key procedure provided. The procedure is run in QUARTERS II,compiled ,debugged and simulated,the conclusion is that the procedure meets designing requirements. The design makes use of CPLD to analog for two transmission lines of I2C , completes control of enhanced video microprocessor SAA7111 through I2C bus.The method is more simple, flexible, lower resource occupied and portability compared with traditional CPLD way.

Keywords

logic design; microcontrollers; program compilers; program debugging; programmable logic devices; CPLD control; I2C bus; I2C transmission lines; QUARTERS II; SAA7111; communication protocol; enhanced video microprocessor; video processor design; Clocks; Data communication; Hardware; Protocols; Registers; Timing; Writing; Bus protocol; CPLD; SAA7111; Video processor;

fLanguage

English

Publisher

ieee

Conference_Titel

Mechatronic Science, Electric Engineering and Computer (MEC), 2011 International Conference on

Conference_Location

Jilin

Print_ISBN

978-1-61284-719-1

Type

conf

DOI

10.1109/MEC.2011.6025682

Filename

6025682