Title :
A framework for a parallel architecture dedicated to soft computing
Author :
Ascia, Giuseppe ; Catania, Vincenzo
Author_Institution :
Ist. di Inf. e Telecommun., Catania Univ., Italy
Abstract :
This paper presents the architecture of a parallel processor dedicated to real-time fuzzy application. The main features of the architecture are: a pre-computation phase of the positive degree of truth of the antecedent with fuzzy inputs; a detection phase of the active rules. The processing speed is up to 2.8 MFLIPS (256 Rules, 8 Antecedents, 1 Consequent). The silicon area estimated is 25 mm2
Keywords :
CMOS digital integrated circuits; VLSI; fuzzy logic; fuzzy set theory; inference mechanisms; microprocessor chips; parallel architectures; real-time systems; special purpose computers; 0.5 micron; CMOS implementation; active rules; dedicated parallel processor; detection phase; parallel architecture; pre-computation phase; real-time fuzzy application; soft computing; Computer architecture; Concurrent computing; Fuzzy logic; Fuzzy set theory; Fuzzy sets; Parallel architectures; Phase detection; Shape; Silicon; Telecommunication computing;
Conference_Titel :
VLSI Design, 1998. Proceedings., 1998 Eleventh International Conference on
Conference_Location :
Chennai
Print_ISBN :
0-8186-8224-8
DOI :
10.1109/ICVD.1998.646625
