DocumentCode
3394403
Title
Cycle-accurate energy measurement and high-level energy characterization of FPGAs
Author
Lee, Hyung Gyu ; Nam, Sungyuep ; Chang, Naehyuck
Author_Institution
Sch. of Comput. Sci. & Eng., Seoul Nat. Univ., South Korea
fYear
2003
fDate
24-26 March 2003
Firstpage
267
Lastpage
272
Abstract
Field programmable gate arrays (FPGAs) play many important roles, ranging from small glue logic replacement to system-on-chip designs. Nevertheless, FPGA vendors can not accurately specify the energy consumption information of their products on the device data sheets because the energy consumption of FPGAs is strongly dependent on target circuit including resource utilization, logic partitioning, mapping, placement and route. While major CAD tools have started to report average power consumption under given transition activities, energy optimal FPGA design demands more detailed energy estimation. In this paper, we introduce an in-house cycle-accurate energy measurement tool and energy characterization schemes from low level to operation level. The tool offers all the necessary capability to investigate the energy consumption of FPGAs for high-level, operation-based energy characterization, which is useful for high-level, system-wide energy estimation. It also includes features for low-level energy characterization. We compare our tool with Xilinx XPower and demonstrate state machine energy characterization of an LCD controller and an SDRAM controller.
Keywords
energy measurement; field programmable gate arrays; logic partitioning; power consumption; system-on-chip; CAD tools; FPGA; LCD controller; SDRAM controller; Xilinx XPower; cycle accurate energy measurement; device data sheets; energy consumption; field programmable gate array; glue logic replacement; high level energy characterization; logic partitioning; mapping; power consumption; resource utilization; state machine energy characterization; system on chip design; target circuit; transition activity; Design automation; Energy consumption; Energy measurement; Field programmable gate arrays; Logic circuits; Logic design; Logic devices; Programmable logic arrays; Resource management; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Quality Electronic Design, 2003. Proceedings. Fourth International Symposium on
Print_ISBN
0-7695-1881-8
Type
conf
DOI
10.1109/ISQED.2003.1194744
Filename
1194744
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