Asynchronous design of energy efficient full adder

Asynchronous adiabatic logic (AAL) is a novel low-power design technique which combines the energy saving benefits of asynchronous systems with adiabatic benefits. In this paper, energy efficient full adder cell using double pass transistor with asynchronous adiabatic logic (DPTAAL) is investigated. Asynchronous adiabatic circuits are very low power circuits to preserve energy for reuse, which reduces the amount of energy drawn directly from the power supply. In this work, a full adder cell using DPTAAL is designed and simulated, which exhibits less energy and reliable logical operations. To improve the circuit performance at reduced voltage level, double pass transistor logic (DPL) is introduced. The energy performance of the proposed design is compared with the conventional CMOS full adder and the quasi-adiabatic families of full adder cell designs namely, 2N2P, 2N2N2P, PFAL, ADSL, IPGL. Simulation results show significant energy savings from 15 to 75% for clock rates ranging from 100MHz to 200MHz.