A test structure for spatial analysis of hot-carrier-induced photoemission in n-MOSFET

Author

Matsuda, Toshihiro ; Tanaka, T. ; Iwata, Hideyuki ; Ohzone, Takashi ; Yamashita, Kyoji ; Koike, Norio ; Tatsuuma, K.

Author_Institution

Dept. of Electron. & Informatics, Toyama Prefectural Univ., Japan

fYear

2005

fDate

4-7 April 2005

Firstpage

47

Lastpage

51

Abstract

A test structure and method for two-dimensional analysis of hot-carrier-induced photoemission in n-MOSFETs are presented. Photoemission intensity profiles along the gate width direction are analyzed and a method to derive the precise peak position of photoemission intensity from the center of the MOSFET gate is proposed. It can measure the variation of the photoemission peak position along the gate width direction. The peak exists in the LDD region, and the distance from the gate edge is about 20∼30 nm independent of V_G.

Keywords

MOSFET; hot carriers; photoemission; semiconductor device measurement; semiconductor device reliability; 20 to 30 nm; LDD region peak; gate width direction intensity profiles; hot-carrier effects; hot-carrier-induced photoemission; n-MOSFET; peak gate edge distance; peak position variation measurement; photoemission 2D spatial analysis; photoemission intensity peak position determination; photoemission intensity profiles; reliability; Charge coupled devices; Hot carriers; MOSFET circuits; Microscopy; Photoelectricity; Pixel; Position measurement; Signal to noise ratio; Testing; Wavelength measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Test Structures, 2005. ICMTS 2005. Proceedings of the 2005 International Conference on

Print_ISBN

0-7803-8855-0

Type

conf

DOI

10.1109/ICMTS.2005.1452217

Filename

1452217