Title :
Architecture constraints over dynamic current consumption
Author :
Yahalom, Gilad ; Vikinski, Omer ; Sizikov, Gregory
Author_Institution :
Intel Corp., Haifa
Abstract :
Microprocessor architecture poses constraints over the dynamic load consumption. Those constraints limit the range of hypothetical stimuli that the power delivery scheme can experience. Some guiding rules for power delivery quality relaxation can be deduced.
Keywords :
microprocessor chips; power supply quality; dynamic current consumption; microprocessor architecture; power delivery quality relaxation; Costs; Degradation; Frequency measurement; Impedance measurement; Microprocessors; Packaging; Power system dynamics; Resonance; Stress; Voltage; architecture stimuli; dynamic current consumption;
Conference_Titel :
Electrical Performance of Electronic Packaging, 2008 IEEE-EPEP
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-2873-1
DOI :
10.1109/EPEP.2008.4675861
