DocumentCode :
3395723
Title :
Computing stress tests for gate-oxide shorts
Author :
Dabholkar, Vinay ; Chakravarty, Sreejit
Author_Institution :
Somerset Design Center, Motorola Inc., Austin, TX, USA
fYear :
1998
fDate :
4-7 Jan 1998
Firstpage :
378
Lastpage :
381
Abstract :
Reliability screens are used to reduce infant mortality. The quality of the stress test set used during the screening process has a direct bearing on the effectiveness of the screen. We present a formal study of the problem of computing good quality stress tests for gate-oxide shorts which is the cause of much of the reliability problems. A method to compute stress test which is better than the popular method of using IDDQ vectors is presented
Keywords :
integrated circuit reliability; integrated circuit testing; gate-oxide short; infant mortality; reliability screen; stress test; Circuit testing; Computer science; Integrated circuit interconnections; Integrated circuit testing; Low voltage; MOS devices; Production facilities; Stress; Temperature; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 1998. Proceedings., 1998 Eleventh International Conference on
Conference_Location :
Chennai
ISSN :
1063-9667
Print_ISBN :
0-8186-8224-8
Type :
conf
DOI :
10.1109/ICVD.1998.646637
Filename :
646637
Link To Document :
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