DocumentCode :
3395942
Title :
A case analysis of system partitioning and its relationship to high-level synthesis tasks
Author :
Yang, Zhang ; Gupta, Rajesh K.
Author_Institution :
Dept. of Inf. & Comput. Sci., California Univ., Irvine, CA, USA
fYear :
1998
fDate :
4-7 Jan 1998
Firstpage :
442
Lastpage :
448
Abstract :
In this paper, we investigate the relationship between partitioning and high-level synthesis tasks, namely operation scheduling and resource allocation/binding. The interaction between partitioning and synthesis tasks is explored using IP formulations for four different design approaches representing different strategies for high-level synthesis. The results are quantified by varying three design parameters, namely the partition size bound, resource size bound and latency margin bound. Experimental results show the tradeoff between the quality of synthesis results and the computation cost for different design approaches, while simultaneous partitioning and synthesis tasks gives the best results, and the computational efficiency can be improved by separating scheduling from partitioning
Keywords :
high level synthesis; integer programming; resource allocation; scheduling; CAD; IP formulations; computation cost; computational efficiency improvement; design parameters; high-level synthesis tasks; latency margin bound; operation scheduling; partition size bound; resource allocation/binding; resource size bound; system partitioning; Computer aided software engineering; Computer science; Costs; Delay; High level synthesis; Packaging; Partitioning algorithms; Processor scheduling; Resource management; Scheduling algorithm;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 1998. Proceedings., 1998 Eleventh International Conference on
Conference_Location :
Chennai
ISSN :
1063-9667
Print_ISBN :
0-8186-8224-8
Type :
conf
DOI :
10.1109/ICVD.1998.646647
Filename :
646647
Link To Document :
بازگشت