• DocumentCode
    3396335
  • Title

    Optical flatness and alignment mark contrast in highly planar technologies

  • Author

    Golz, John ; Martin, Alex ; Chen, Bomy

  • Author_Institution
    IBM Corp., East Fishkill, NY, USA
  • fYear
    1997
  • fDate
    10-12 Sep 1997
  • Firstpage
    300
  • Lastpage
    304
  • Abstract
    The authors discuss an interlevel alignment problem encountered during the implementation of a highly planarized microelectronics manufacturing technology. The problem is caused by alignment marks with poor bright field image contrast and affects the ability of alignment and registration systems to properly detect and resolve mark positions. The bright field image contrast of the marks, which are formed by recessing polysilicon through a patterned silicon nitride layer, is found to depend strongly on both the depth of the mark as well as the thickness of the overlying nitride. Computer simulation is used to explore a correlation between poor contrast and small optical step height, highlighting a distinction between physical flatness and optical flatness. A simple optical path length calculation which takes into account process variations serves as a check for optical flatness and provides a set of guidelines for ensuring reliable detection of alignment marks
  • Keywords
    digital simulation; electronic engineering computing; integrated circuit manufacture; integrated circuit measurement; lithography; optical images; surface topography; Si; Si3N4; TEMPEST program; alignment mark contrast; bright field image contrast; computer simulation; highly planar technologies; interlevel alignment problem; microelectronics manufacturing technology; optical flatness; optical path length calculation; optical step height; patterned silicon nitride layer; polysilicon recessing; process variations; registration systems; reliable detection; Chemical technology; Coatings; Dielectric materials; Etching; Microelectronics; Planarization; Resists; Semiconductor device manufacture; Silicon; Surface topography;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Advanced Semiconductor Manufacturing Conference and Workshop, 1997. IEEE/SEMI
  • Conference_Location
    Cambridge, MA
  • ISSN
    1078-8743
  • Print_ISBN
    0-7803-4050-7
  • Type

    conf

  • DOI
    10.1109/ASMC.1997.630752
  • Filename
    630752