Title :
Thin film Barium-Strontium-Titanate Parallel-Plate varactors integrated on low-resistivity silicon and saphhire substrate
Author :
Hailing Yue ; Brown, Dean ; Subramanyam, Guru ; Leedy, Kevin ; Cerny, Charles
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Dayton, Dayton, OH, USA
Abstract :
Barium-Strontium-Titanate (BST) thin film based ferroelectric varactors are designed at specific capacitances under 0V dc bias on CMOS compatible low-resistivity silicon substrate. The BST varactor device operation is based on the nonlinear dielectric tunability of BST thin film sandwiched between two metal plates in a revised conductor-backed coplanar waveguide (CBCPW) transmission line configuration. The varactor capacitance at 0V dc bias is determined by the overlap area between the CPW signal line in the top metal electrode and a tapered shunt line in the bottom electrode. Therefore a series of devices with unbiased capacitances ranging from 0.8pF to 4.8pF were designed and fabricated based on changing their corresponding overlap areas according to the generic parallel plate capacitance equation. A schematic model was also utilized to extract the designed and measured capacitances. The relationships between the sizes of overlap areas and the extracted capacitances from the electromagnetic and schematic models are demonstrated by a reasonable agreement with the experimental measurements from fabricated devices. Devices were also designed and fabricated on sapphire substrate with three layout variations aiming to modify the parasitic resistance.
Keywords :
barium compounds; coplanar transmission lines; coplanar waveguides; ferroelectric devices; ferroelectric thin films; strontium compounds; varactors; Al2O3; BST varactor device operation; BaxSr1-xTiO3; CMOS compatible low-resistivity silicon substrate; CPW signal line; Si; bottom electrode; capacitance 0.8 pF to 4.8 pF; conductor-backed coplanar waveguide transmission line configuration; electromagnetic models; ferroelectric varactors; layout variations; low-resistivity sapphire substrate; metal plates; nonlinear dielectric tunability; overlap areas; parallel plate capacitance equation; parasitic resistance; schematic models; tapered shunt line; thin film barium-strontium-titanate parallel-plate varactors; top metal electrode; varactor capacitance; Area measurement; CMOS integrated circuits; Electrodes; Standards; Substrates; coplanar waveguide; ferroelectric devices; low-resistivity silicon; varactors;
Conference_Titel :
Applications of Ferroelectric and Workshop on the Piezoresponse Force Microscopy (ISAF/PFM), 2013 IEEE International Symposium on the
Conference_Location :
Prague
DOI :
10.1109/ISAF.2013.6748691