DocumentCode
3396938
Title
Suppression of power/ground noise using differential vias
Author
Chen, Ruiming ; Wang, Haining ; Abhari, Ramesh
Author_Institution
Dept. of Electr. & Comput. Eng., McGill Univ., Montreal, QC
fYear
2008
fDate
27-29 Oct. 2008
Firstpage
325
Lastpage
328
Abstract
In this study, the power/ground noise excited by multilayer differential vias is quantified by employing analytical cavity method and 3-D full wave simulations. The evolution pattern of the noise on the reference voltage plane is predicted by these two methods. Prediction of power/ground noise map can be employed in component placement and pin assignment in area array integrated circuits.
Keywords
integrated circuit interconnections; integrated circuit layout; integrated circuit noise; 3D fullwave simulation; analytical cavity method; component placement; integrated circuits; multilayer differential vias; noise evolution pattern; pin assignment; power/ground noise; reference voltage plane; Circuit noise; Circuit simulation; Computational modeling; Electronic circuits; Impedance; Integrated circuit interconnections; Integrated circuit noise; Nonhomogeneous media; Transmission line matrix methods; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Performance of Electronic Packaging, 2008 IEEE-EPEP
Conference_Location
San Jose, CA
Print_ISBN
978-1-4244-2873-1
Type
conf
DOI
10.1109/EPEP.2008.4675946
Filename
4675946
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