• DocumentCode
    3396999
  • Title

    Chip-package co-simulation with multiscale structures

  • Author

    Ha, Myunghyun ; Srinivasan, Krishna ; Swaminathan, Madhavan

  • Author_Institution
    Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA
  • fYear
    2008
  • fDate
    27-29 Oct. 2008
  • Firstpage
    339
  • Lastpage
    342
  • Abstract
    Chip-package co-simulation is required to predict the interaction between the chip and package at the system level. The FDTD method can be used to analyze these structures but is limited by the Courant condition. In this paper, an alternate method is suggested by combining Laguerre Polynomials with the FDTD method. Since, the solution is implicit, the Courant condition is no longer an issue and therefore the method provides unconditional stability. In addition, the time domain response can be computed similar to the FDTD scheme. The formulation allows the conversion of an electromagnetic problem to a circuit representation with resistors, voltage and current sources. Such a representation is useful since a DC solution can be used to obtain the transient response. To obtain the low frequency response using an FDTD based method, computing the time domain response over long time duration is required. Due to the behavior of the Laguerre Polynomials, this can be difficult. In this paper, computing the time domain response over several micro-seconds is discussed using Laguerre Polynomials combined with the FDTD scheme. This method now can be applied to compute the frequency response from DC to very high frequencies for multiscale structures arising in chip-package co-simulation.
  • Keywords
    chip scale packaging; finite difference time-domain analysis; integrated circuit interconnections; resistors; stochastic processes; Courant condition; FDTD method; Laguerre polynomials; chip-package cosimulation; electromagnetic problem; multiscale structures; resistors; time domain response; Circuit stability; Finite difference methods; Frequency response; Packaging; Polynomials; Resistors; Time domain analysis; Time factors; Transient response; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical Performance of Electronic Packaging, 2008 IEEE-EPEP
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    978-1-4244-2873-1
  • Type

    conf

  • DOI
    10.1109/EPEP.2008.4675950
  • Filename
    4675950