FPGA architecture of HMM-based decoder module in speech recognizer

Author

Trang Hoang ; Viet Vo Quoc ; Truong Nguyen Ly Thien

Author_Institution

Ho Chi Minh City Univ. of Technol., Ho Chi Minh City, Vietnam

fYear

2012

fDate

26-29 Nov. 2012

Firstpage

354

Lastpage

358

Abstract

This paper presents the reconfigurable architecture and implementation of HMM-based decoder module in speech recognizer on FPGA. The architecture is done with different parameters of speech recognition system that could be easily reconfigurable. The design and implementation on FPGA have been verified with utterances of 800 test speeches. The implementation results, the recognition accuracy results of up to 98% are also presented.

Keywords

decoding; field programmable gate arrays; hidden Markov models; reconfigurable architectures; speech recognition; FPGA architecture; HMM-based decoder module; reconfigurable architecture; speech recognition system; speech recognizer; Accuracy; Field programmable gate arrays; Hidden Markov models; Mathematical model; Registers; Speech; Speech recognition; Hidden Markov Model; Speech recognition; Viterbi Algorithm; number of mixture; number of state;

fLanguage

English

Publisher

ieee

Conference_Titel

Control, Automation and Information Sciences (ICCAIS), 2012 International Conference on

Conference_Location

Ho Chi Minh City

Print_ISBN

978-1-4673-0812-0

Type

conf

DOI

10.1109/ICCAIS.2012.6466617

Filename

6466617

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3397104