DocumentCode
3397272
Title
A CMOS differential amplifier with well-controlled voltage gain
Author
Matthews, Thomas W.
Author_Institution
Dept. of Electr. Eng., San Jose State Univ., CA, USA
Volume
2
fYear
1997
fDate
3-6 Aug. 1997
Firstpage
1411
Abstract
A topology for a differential CMOS buffer amplifier is introduced. When compared to a popular differential amplifier cascaded with a source follower buffer, the new topology offers a better-controlled voltage gain at the same power dissipation. The new topology can have increased settling time, but the factors affecting its time domain response are discussed.
Keywords
CMOS analogue integrated circuits; buffer circuits; differential amplifiers; feedback amplifiers; frequency response; linear network analysis; sensitivity analysis; CMOS differential amplifier; buffer amplifier; controlled voltage gain; settling time; time domain response; Circuit stability; Differential amplifiers; Equations; Feedback loop; Frequency response; Impedance; Negative feedback; Negative feedback loops; Topology; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on
Print_ISBN
0-7803-3694-1
Type
conf
DOI
10.1109/MWSCAS.1997.662347
Filename
662347
Link To Document