A novel technique of PLA test generation for multiprocessing environment

Author

Cross, A. ; Sarma, D.

Author_Institution

Dept. of Electr. & Comput. Eng., Cincinnati Univ., OH, USA

fYear

1991

fDate

14-17 May 1991

Firstpage

982

Abstract

The authors focus on the multitasking technique, in particular using macrotasking for the test generation of PLAs (programmable logic arrays). The results show an impressive speedup that is even greater when vectorization and multitasking are used simultaneously. These two avenues can achieve higher speed performance for PLA test generation than any previous implementation reported

Keywords

PLD programming; VLSI; integrated circuit testing; logic arrays; logic testing; multiprocessing systems; multiprogramming; PLA test generation; macrotasking; multiprocessing environment; multitasking; multitasking technique; programmable logic arrays; speedup; vectorization; Algorithms; Circuit faults; Circuit testing; Fault detection; Libraries; Multitasking; Parallel processing; Programmable logic arrays; Supercomputers; System testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1991., Proceedings of the 34th Midwest Symposium on

Conference_Location

Monterey, CA

Print_ISBN

0-7803-0620-1

Type

conf

DOI

10.1109/MWSCAS.1991.251971

Filename

251971

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3397756