Title :
A ratio insensitive cyclic D/A conversion technique
Author :
Won, K.C. ; Burra, G. ; Chao, K.S.
Author_Institution :
Dept. of Electr. Eng., Texas Tech. Univ., Lubbock, TX, USA
Abstract :
An error-compensation technique for a cyclic digital-to-analog (D/A) converter is proposed. Without the use of precision passive components, this approach improves the resolution of the converter. The circuit utilizes an accurate divide-by-two method for generating the necessary reference voltages. The operation takes two clock cycles per bit conversion. With the use of only one op amp, and a few capacitors and switches, the circuit can be implemented by a switched capacitor circuit in a fairly small chip area. The proposed technique has been verified using SPICE, and a 14-bit resolution has been obtained in simulation
Keywords :
coding errors; digital-analogue conversion; error compensation; switched capacitor networks; 14-bit resolution; DAC; SPICE; cyclic D/A conversion technique; digital/analog convertor; divide-by-two method; error-compensation; op amp; ratio insensitive; reference voltages; simulation; switched capacitor circuit; Analog-digital conversion; Calibration; Chaos; Charge transfer; Signal resolution; Switched capacitor circuits; Switches; Switching circuits; Switching converters; Voltage;
Conference_Titel :
Circuits and Systems, 1991., Proceedings of the 34th Midwest Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-0620-1
DOI :
10.1109/MWSCAS.1991.252010
