DocumentCode
3398689
Title
An automatic interconnection rectification technique for SoC design integration
Author
Wang, Chun-Yao ; Tung, Shing-Wu ; Jou, Jing-Yang
Author_Institution
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear
2003
fDate
21-24 Jan. 2003
Firstpage
108
Lastpage
111
Abstract
This paper presents an automatic interconnection rectification (AIR) technique to correct the misplaced interconnection occurring in the integration of an SoC design automatically. The experimental results show that the AIR can correct the misplaced interconnection and therefore accelerates the integration verification of an SoC design.
Keywords
circuit simulation; fault diagnosis; formal verification; integrated circuit design; integrated circuit interconnections; logic design; logic simulation; system-on-chip; AIR; SoC design integration; automatic interconnection rectification technique; core-based design; design verification; fault detection; fault diagnosis; misplaced interconnection; system-on-chip; Acceleration; Automatic logic units; Circuit faults; Circuit simulation; Design methodology; Error correction; Integrated circuit interconnections; Logic design; Testing; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2003. Proceedings of the ASP-DAC 2003. Asia and South Pacific
Print_ISBN
0-7803-7659-5
Type
conf
DOI
10.1109/ASPDAC.2003.1195002
Filename
1195002
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