DocumentCode
3399104
Title
Noncheckpoint target faults-how to order them?
Author
Gopalakrishnan, K. ; Bhattacharya, Bhargab
Author_Institution
Nebraska Univ., Lincoln, NE, USA
fYear
1991
fDate
14-17 May 1991
Firstpage
619
Abstract
M. Abramovici, P.R. Menon, and D.T. Miller (see IEEE Trans. on Computers, vol.C-35, no.8, p.760-71, Aug. 1986) observed that the checkpoint faults are not sufficient target faults for test generation in combinational circuits and presented an algorithm to select the additional target faults so as to ensure sufficiency. A critical review of their algorithm is presented, and certain disadvantages of that algorithm are brought to light. A revised algorithm incorporating an additional stage of fault simulation and judicious selection of noncheckpoint target faults based on a probabilistic model is developed. The concepts of cover forest and benefit indicators are developed and used effectively in guiding the judicious selection of noncheckpoint target faults, thus minimizing the total number of calls made to the test generation routine
Keywords
combinatorial circuits; fault location; logic testing; benefit indicators; combinational circuits; cover forest; fault simulation; logic testing; noncheckpoint target faults; probabilistic model; test generation; Automatic test pattern generation; Circuit faults; Circuit simulation; Circuit testing; Combinational circuits; Electrical fault detection; Fault detection; Fault diagnosis; Redundancy; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1991., Proceedings of the 34th Midwest Symposium on
Conference_Location
Monterey, CA
Print_ISBN
0-7803-0620-1
Type
conf
DOI
10.1109/MWSCAS.1991.252036
Filename
252036
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